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Hardware Configuration and Definition (HCD) for z/OS

  • Course Code ES96G
  • Duration 4 days

Course Delivery

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  • GTC 38 inc. VAT

    GTC, Global Knowledge Training Credit, please contact Global Knowledge for more details

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Course Delivery

This course is available in the following formats:

  • Company Event

    Event at company

  • Public Classroom

    Traditional Classroom Learning

  • Virtual Learning

    Learning that is virtual

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Course Overview

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This course is designed to teach you how to use the Hardware Configuration Definition (HCD) of z/OS to create an I/O configuration and dynamically alter the I/O configuration.

Company Events

These events can be delivered exclusively for your company at our locations or yours, specifically for your delegates and your needs. The Company Events can be tailored or standard course deliveries.

Course Schedule

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Target Audience

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This course is for people responsible for maintaining the I/O configuration contained in the input/output data files (IODFs) and input/output configuration data sets (IOCDs) at their z/OS installation.

Course Objectives

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  • Describe new zSeries processor technology
  • Code new zSeries processors (z990 to z10)
  • Code ESCON channels and ESCON CTCs
  • Code FICON channels and FICON CTCs
  • Code Coupling Facilities (CF) and CF links
  • Code cascaded FICON Director
  • Create an IODF work file on a z processor from scratch
  • Use CHPID mapping tool to create a validated work IODF
  • Use work IODF and create a production IODF
  • Perform Dynamic I/O changes on a real z/OS system
  • Build a LOADxx parmlib member for initial program load (IPL)
  • View configuration graphically
  • Create appropriate configuration reports

Course Content

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Day 1

  • (00:30) Welcome
  • (01:00) Unit 1: HCD introduction
  • (00:30) Unit 2: IOCP and MVSCP macro review
  • (00:30) Unit 3: HCD dialog
  • (01:00) Unit 4: LPAR and logical control units
  • (02:00) Unit 5: ESCON Directors
  • (00:15) Unit 6: OSAs, HiperSockets, and routers
  • (00:30) Exercise 1: Overview of lab environment
  • (00:45) Exercise 2: HCD familiarity

Day 2

  • (00:30) Unit 7: Review of zSeries hardware
  • (01:30) Unit 8: z990, z9, z10, and HCD
  • (01:00) Unit 9: FICON, FICON CTCs, and FICON directors
  • (03:00) Exercise 3: Coding a zSeries 2094
  • (06:00) Exercise 4: Add ESCON directors to your configuration
  • (00:30) Exercise 5: Add FICON directors to your configuration (optional)

Day 3

  • (01:00) Unit 10: Planning and migration
  • (01:00) Unit 11: IPL and LOADxx member
  • (00:45) Unit 12: Dynamic I/O reconfiguration
  • (00:30) Exercise 6: Incremental migration from IOCP deck (optional)
  • (00:30) Exercise 7: Building a LOADxx member
  • (01:00) Exercise 8: Perform dynamic I/O

Day 4

  • (01:00) Unit 13: z10 HCD and using CMT
  • (01:00) Unit 14: ESCON CTCs for sysplex
  • (00:45) Unit 15: HCD and parallel sysplex
  • (00:45) Exercise 9: Coding a 2097 using the CMT
  • (00:30) Exercise 10: Coding CFs and CF links including z10 CIB links
  • (00:20) Exercise 11: Coding sysplex CTCs (optional)

Course Prerequisites

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You should have:

  • basic knowledge of z/OS and I/O configuration. This knowledge can be developed on the job or by taking Fundamental System Skills in z/OS (ES10GB).
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